100Gbps QSFP28
LR4 Dual Rates Optical Transceiver Module SOQP-LR4-10 datasheet
Features
n Hot pluggable QSFP28
MSA form factor
n
Compliant to
IEEE 802.3ba 100GBASE-LR4, ITU G.959.1, and CFP-MSA-
HW-Specification
n Supports 103.1Gb/s
and 112Gb/s aggregate
bit rates
n Up to 10km reach for G.652 SMF
n Single +3.3V power supply
n Operating case
temperature: 0~70℃
n
Transmitter: cooled 4x28Gb/s LAN WDM EML TOSA (1295.56, 1300.05, 1304.58, 1309.14nm)
n Receiver: 4x28Gb/s
PIN ROSA
n 4x28G Electrical Interface (OIF CEI-28G-VSR)
n Maximum power consumption 4.5W
n Duplex LC receptacle
n RoHS-6 compliant
Applications
n 100GBASE-LR4 100G Ethernet
n OTN OTU4 4I1-9D1F
Absolute
Maximum Ratings
Parameter
|
Symbol
|
Min.
|
Max.
|
Units
|
Note
|
Storage Temperature
|
Ts
|
-40
|
85
|
℃
|
|
Operating Case Temperature
|
Top
|
0
|
70
|
℃
|
|
Supply Voltage
|
Vcc
|
-0.5
|
3.6
|
V
|
|
Relative Humidity
(non-condensation)
|
RH
|
0
|
85
|
%
|
|
Damage Threshold, each Lane
|
THd
|
5.5
|
dBm
|
Recommended
Operating Conditions
|
|||||
Parameter
|
Symbol
|
Min.
|
Typ.
|
Max.
|
Units
|
Operating Case Temperature
|
Top
|
0
|
70
|
℃
|
|
Power Supply Voltage
|
Vcc
|
3.135
|
3.3
|
3.465
|
V
|
Data Rate, each Lane
(100GE)
|
25.78125
|
Gb/s
|
|||
Data Rate Accuracy (100GE)
|
-100
|
100
|
ppm
|
||
Data Rate, each Lane (OTU4)
|
27.95249
|
Gb/s
|
|||
Data Rate Accuracy (OTU4)
|
-20
|
20
|
ppm
|
||
Control Input Voltage High
|
2
|
Vcc
|
V
|
||
Control Input Voltage Low
|
0
|
0.8
|
V
|
||
Link Distance with G.652
|
D
|
0.002
|
10
|
km
|
|
 |
Diagnostics Monitoring
Temperature monitor Over operating
absolute error DMI_Temp ±3 °C temperature
range
Supply voltage monitor
absolute error
|
DMI_VCC
|
± 0.1
|
V
|
Over full operating range
|
Channel
RX power
|
||||
monitor absolute error
|
DMI_RX_Ch
|
±2
|
dB
|
1
|
Channel
Bias current monitor
|
DMI_Ibias_Ch
|
± 10%
|
mA
|
|
Channel
TX power monitor absolute error
|
DMI_TX_Ch
|
±2
|
dB
|
1
|
Notes:
1. Due to measurement accuracy of different
single mode fibers,
there could be an additional +/-1 dB fluctuation, or a +/- 3 dB total accuracy.
 |
Transmitter Electrical Characteristics
Power Consumption 4.5 W
 |
Supply Current Icc 1.36 A
Overload Differential Voltage
pk-pk TP1a 900 mV |
Common Mode Voltage (Vcm) TP1 -350 2850 mV 1
Differential Termination
Resistance Mismatch TP1 10 % At 1MHz See
CEI-28G-VSR
Differential Return Loss
(SDD11) TP1
Common Mode to Differential
conversion and Differential to
TP1
Common Mode conversion
(SDC11, SCD11)
See
dB
Equation
13-19
See
CEI-28G-VSR
dB
Equation
13-20
Stressed Input Test TP1a CEI-28G-VS R Section
 |
13.3.11.2.1
Notes:
1. Vcm is generated by the host. Specification includes effects of ground offset voltage.
Transmitter
Optical Characteristics for IEE802.3 100GBASE-LR4
Parameter
Data Rate, each Lane
|
Test Point
|
Min
|
Typ.
25.78125
|
Max
|
Units
Gb/s
|
Notes
|
|
Data Rate Accuracy
|
-100
|
100
|
ppm
|
||||
L0
|
1294.53
|
1295.56
|
1296.59
|
nm
|
|||
L1
|
1299.02
|
1300.05
|
1301.09
|
nm
|
|||
Lane Wavelength
|
L2
|
1303.54
|
1304.58
|
1305.63
|
nm
|
||
L3
|
1308.09
|
1309.14
|
1310.19
|
nm
|
|||
Side Mode Suppression Ratio
|
SMSR
|
30
|
dB
|
||||
Total Average Launch Power
|
PT
|
10.5
|
dBm
|
||||
Average Launch Power, each
|
|||||||
Lane
|
PAVG
|
-4.3
|
4.5
|
dBm
|
|||
OMA, each Lane
|
POMA
|
-1.3
|
4.5
|
dBm
|
1
|
||
Difference in Launch Power
|
|||||||
between any Two Lanes (OMA)
|
Ptx, diff
|
5
|
dB
|
||||
Launch Power in OMA minus
|
|||||||
Transmitter and Dispersion
|
-2.3
|
dBm
|
|||||
Penalty (TDP), each Lane
|
|||||||
TDP, each Lane
|
TDP
|
2.2
|
dB
|
||||
Extinction Ratio
|
ER
|
4.0
|
dB
|
||||
RIN20OMA
|
RIN
|
-130
|
dB/Hz
|
||||
Optical Return Loss
Tolerance
|
TOL
|
20
|
dB
|
||||
Transmitter Reflectance
|
RT
|
-12
|
dB
|
||||
Average
Launch Power OFF
|
Transmitter, each Lane Poff -30 dBm |
Eye Mask {X1, X2, X3, Y1, Y2, Y3} {0.25, 0.4, 0.45, 0.25, 0.28, 0.4} 2
Notes:
1.
Even if TDP < 1 dB, the OMA min must exceed the minimum value specified here.
2.
Hit ratio 5x10 -5.
Transmitter
Optical Characteristics for ITU G.959.1 OTU4 4I1-9D1F
Parameter
Data Rate, each Lane
|
Test Point
|
Min
|
Typ.
27.95249
|
Max
|
Units
Gb/s
|
Notes
|
Data Rate Accuracy
|
-20
|
20
|
ppm
|
|||
L0
|
1294.53
|
1295.56
|
1296.59
|
nm
|
||
L1
|
1299.02
|
1300.05
|
1301.09
|
nm
|
||
Lane Wavelength
|
L2
|
1303.54
|
1304.58
|
1305.63
|
nm
|
|
L3
|
1308.09
|
1309.14
|
1310.19
|
nm
|
||
Side
Mode Suppression Ratio
|
SMSR
|
30
|
dB
|
|
Total Average
Launch Power PT 10 dBm Average Launch Power, each
 |
Lane PAVG -0.6 4 dBm
Extinction Ratio ER 4.0 6.5 dB
 |
Total Average Launch Power PT 8.9 dBm
Average Launch Power, each
 |
Lane PAVG -2.5 2.9 dBm
Extinction Ratio ER 7 dB Difference in Launch Power
 |
between any Two Lanes
(OMA) Ptx, diff 5 dB
Optical Return Loss ORL 20 dB Average Launch Power OFF
Transmitter, each Lane Poff -30 dBm
Eye Mask {X1,
X2, X3, Y1, Y2, Y3} {0.25, 0.4, 0.45, 0.25,
0.28, 0.4} 1
Notes:
1. Hit ratio 5x10 -5.
 |
Receiver Electrical Characteristics (each Lane)
Differential Voltage, pk-pk TP4 900 mV
Common Mode Voltage
(Vcm) TP4 -350 2850 mV 1
Common Mode Noise, RMS TP4 17.5 mV
Differential Termination Resistance |
Mismatch TP4 10 % At 1MHz
See
CEI-28G-VSR
Differential Return Loss
(SDD22) TP4
Common Mode to Differential
conversion and Differential to
TP4
Common Mode conversion
(SDC22, SCD22)
Common Mode Return Loss
(SCC22) TP4
dB
Equation
13-19
See
CEI-28G-VSR
dB
Equation
13-21
-2 dB 2
Transition Time, 20 to 80% TP4 9.5 ps
Vertical Eye Closure
(VEC) TP4 5.5 dB Eye Width at 10-15 probability
(EW15) TP4
Eye Height at 10-15 probability
(EH15) TP4
Notes:
0.57 UI
228 mV
1.
Vcm is generated
by the host. Specification includes effects of ground offset voltage.
2.
From 250MHz to 30GHz.
 |
Receiver Optical Characteristics for IEE802.3 100GBASE-LR4
Damage Threshold, each Lane THd 5.5 dBm Total Average Receive
Power 10.5 dBm
Average Receive Power, each |
Lane -10.6 4.5 dBm
Receive Power
(OMA), each Lane 4.5 dBm
Receive Sensitivity (OMA), each
 |
Lane SEN -8.6 dBm
Stressed Receiver Sensitivity
(OMA), each Lane -6.8 dBm 1
Receiver Reflectance RR -26 dB
Difference in Receive Power |
between any Two Lanes (OMA) Prx,diff 5.5 dB
LOS Assert LOSA -18 dBm
LOS Deassert LOSD -15 dBm
LOS Hysteresis LOSH 0.5 dB Receiver
Electrical 3 dB upper |
Cutoff Frequency, each Lane Fc 31 GHz
Vertical Eye Closure Penalty, each
 |
Lane 1.8 dB
Stressed Eye J2 Jitter,
each Lane 0.3 UI
Stressed Eye J9 Jitter, each Lane 0.47 UI Notes:
1.
Measured with conformance test signal at receiver input for BER = 1x10-12.
2.
Vertical eye closure penalty, stressed eye J2 jitter,
and stressed eye J9 jitter
are test conditions for measuring stressed receiver
sensitivity. They are not characteristics of the receiver.
 |
Receiver Optical Characteristics for ITU G.959.1 OTU4 4I1-9D1F
Damage Threshold, each Lane THd 5.5 dBm
 |
Total Average Receive Power 10 dBm
Average Receive Power, each
 |
|
|||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
Lane -6.9 4 dBm
Equivalent Sensitivity (Average),
 |
 |
Notes:
1. Specified at a BER of 10-6 (pre-FEC), per ITU-T G.sup39.
Block Diagram of
Transceiver
This product is a 100Gb/s
or 112Gb/s transceiver module designed
for optical communication applications compliant to 100GBASE-LR4 requirements specified in IEEE 802.3ba and OTN
OTU4 4I1-9D1F requirements
specified in ITU-T Recommendations G.959.1 and Supplement 39
(G.sup39). The module converts 4 input
channels of 25Gb/s or 28Gb/s electrical data to 4 channels of LAN WDM optical signals and then multiplexes
them into a single channel
for 100Gb/s or 112Gb/s optical
transmission. Reversely on the receiver
side, the module
de-multiplexes a 100Gb/s
or 112Gb/s optical
input into 4 channels
of LAN WDM optical
signals and then
converts them to 4 output
channels of electrical data.
The central wavelengths of the 4 LAN
WDM channels are 1295.56, 1300.05,
1304.58 and 1309.14 nm as members of the LAN WDM wavelength grid defined in IEEE 802.3ba. The high performance cooled LAN WDM
EA-DFB transmitters and high sensitivity PIN
receivers provide superior performance for 100Gigabit Ethernet
and OTN OTU4 applications up to 10km links and compliant to optical interface with 100GBASE-LR4 requirements specified in IEEE 802.3ba Clause 88 and OTN OTU4
4I1-9D1F requirements specified in ITU-T Recommendations G.959.1.
The product is designed
with form factor, optical/electrical connection and digital diagnostic
interface according to the QSFP+ Multi-Source Agreement (MSA). It has been
designed to meet the harshest external operating
conditions including
temperature, humidity
and EMI interference.
The transceiver module receives 4 channels of 25Gb/s or 28Gb/s electrical data, which are processed by a
4-channel Clock and Data
Recovery (CDR) IC that reshapes and reduces
the jitter of each electrical signal.
Subsequently, EML laser driver IC converts each one
of the 4 channels of electrical signals to an optical signal
that is
transmitted from one of the 4 cooled EML lasers which are packaged in the
Transmitter Optical
Sub-Assembly (TOSA). Each laser launches the optical signal in specific
wavelength specified in IEEE 802.3ba
100GBASE-LR4 requirements. These 4-lane optical signals will be optically multiplexed into a single
fiber by a
4-to-1
optical WDM MUX.
The optical output power
of each channel
is maintained constant by an automatic power control
(APC) circuit. The transmitter output can be turned off by TX_DIS
hardware signal and/or 2-wire
serial interface.
The receiver receives 4-lane LAN WDM optical signals. The optical signals are de-multiplexed by a 1-to-4 optical
DEMUX and each
of the resulting 4 channels of optical
signals is fed
into one of the 4 receivers that are
packaged into the Receiver Optical Sub-Assembly (ROSA).
Each receiver converts
the optical signal to an
electrical signal. The regenerated electrical signals are retimed and de-jittered and amplified
by the RX portion
of
the 4-channel CDR. The retimed 4-lane
output electrical signals
are compliant with CEI-28G-VSR interface requirements. In addition,
each received optical signal is monitored
by the DOM section. The monitored value is
reported through the 2-wire serial interface. If one or more received
optical signal is weaker
than the threshold
level, RX_LOS hardware
alarm will be triggered.
A single +3.3V
power supply is required to power up this product.
Both power supply
pins VccTx and VccRx
are internally
connected and should be applied concurrently. As per MSA specifications the module offers 7 low
speed hardware control
pins (including the 2-wire serial
interface): ModSelL,
SCL, SDA, ResetL,
LPMode, ModPrsL and IntL.
Module Select (ModSelL) is an input pin. When
held low by the
host, this product
responds to 2-wire
serial communication commands. The ModSelL allows
the use of this
product on a single 2-wire
interface bus – individual ModSelL lines
must be used.
Serial Clock (SCL) and Serial Data (SDA) are required for the 2-wire serial bus communication interface and enable the host to access
the QSFP28 memory map.
The ResetL pin enables a complete reset, returning
the settings to their default state, when a low level on the
ResetL pin is held for
longer than the minimum
pulse length. During
the execution of a reset
the host shall disregard all status bits until it indicates a completion of the reset interrupt. The product
indicates this by posting
an IntL (Interrupt) signal with the Data_Not_Ready bit negated
in the memory map. Note that on power up (including hot insertion) the module
should post this completion
of reset interrupt without requiring a reset.
Low Power Mode (LPMode)
pin is used to set the maximum
power consumption for
the product in order to protect hosts that are not capable
of cooling higher power
modules, should such modules be accidentally
inserted.
Module Present (ModPrsL) is a signal
local to the host board
which, in the absence
of a product, is normally pulled up to the host
Vcc. When the
product is inserted into the connector, it completes the path
to ground through a resistor on the host board
and asserts the signal. ModPrsL
then indicates its present by setting
ModPrsL to a “Low” state.
Interrupt (IntL) is an output pin. “Low” indicates a possible
operational fault or a status critical to the host system. The host identifies the source of the interrupt
using the 2-wire
serial interface. The IntL
pin is an open
collector output
and must be pulled to the Host Vcc voltage
on the Host board.
 |
Pin Assignment
MSA compliant Connector
Pin Description
PIN Logic Symbol Name/Description Note
|
||||
1
|
GND
|
Ground
|
1
|
|
2
|
CML-I
|
Tx2n
|
Transmitter Inverted Data
Input
|
|
3
|
CML-I
|
Tx2p
|
Transmitter Non-Inverted
Data output
|
|
4
|
GND
|
Ground
|
1
|
|
5
|
CML-I
|
Tx4n
|
Transmitter inverted Data
Input
|
|
6
|
CML-I
|
Tx4p
|
Transmitter Non-Inverted
Data output
|
|
7
|
GND
|
Ground
|
1
|
|
8
|
LVTLL-I
|
ModSeIL
|
Module Select
|
|
9
|
LVTLL-I
|
ResetL
|
Module Reset
|
|
10
|
VccRx
|
+3.3V Power Supply Receiver
|
2
|
|
11
|
LVCMOS-I/O
|
SCL
|
2-Wire Serial Interface
Clock
|
|
12
|
LVCMOS-I/O
|
SDA
|
2-Wire Serial Interface
Data
|
|
13
|
GNC
|
Ground
|
||
14
|
CML-O
|
Rx3p
|
Receiver Non-Inverted Data
output
|
|
15
|
CML-O
|
Rx3n
|
Receiver Inverted Data
output
|
|
16
|
GND
|
Ground
|
1
|
|
17
|
CML-O
|
Rx1p
|
Receiver Non-Inverted Data
Output
|
|
PIN
|
Logic
|
Symbol
|
Name/Description
|
Note
|
18
|
CML-O
|
Rx1n
|
Receiver Inverted Data
Output
|
|
19
|
GND
|
Ground
|
1
|
|
20
|
GND
|
Ground
|
1
|
|
21
|
CML-O
|
Rx2n
|
Receiver Inverted Data
output
|
|
22
|
CML-O
|
Rx2p
|
Receiver Non-Inverted Data
output
|
|
23
|
GND
|
Ground
|
1
|
|
24
|
CML-O
|
Rx4n
|
Receiver Inverted Data
output
|
1
|
25
|
CML-O
|
Rx4p
|
Receiver Non-Inverted Data
output
|
|
26
|
GND
|
Ground
|
1
|
|
27
|
LVTTL-O
|
ModPrsL
|
Module Present
|
|
28
|
LVTTL-O
|
IntL
|
Interrupt
|
|
29
|
VccTx
|
+3.3V Power Supply
transmitter
|
2
|
|
30
|
Vcc1
|
+3.3V Power Supply
|
2
|
|
31
|
LVTTL-I
|
LPMode
|
Low Power Mode
|
|
32
|
GND
|
Ground
|
1
|
|
33
|
CML-I
|
Tx3p
|
Transmitter Non-Inverted
Data Input
|
|
34
|
CML-I
|
Tx3n
|
Transmitter Inverted Data
Output
|
|
35
|
GND
|
Ground
|
1
|
|
36
|
CML-I
|
Tx1p
|
Transmitter Non-Inverted
Data Input
|
|
37
|
CML-I
|
Tx1n
|
Transmitter Inverted Data
Output
|
|
38
|
GND
|
Ground
|
1
|
Note:
1. GND is the symbol for signal and supply
(power) common
for the QSFP28 module. All are common
within the
module and all module voltages are referenced to this potential unless
otherwise noted. Connect
these directly to the host board signal
common ground plane.
2.
VccRx, Vcc1 and VccTx are the receiving and
transmission power suppliers and shall be applied
concurrently. Vcc Rx, Vcc1 and
Vcc Tx may be internally connected within the
module in any combination. The
connector pins are each rated for a maximum current
of 1000mA.
Dimensions
Optical Receptacle Cleaning
Recommendations :
All fiber stubs
inside the receptacle portions were cleaned before
shipment. In the event of contamination of the optical
ports, the recommended cleaning process is the use of forced
nitrogen. If
contamination is thought to
have remained, the optical ports can be cleaned using a NTT international
Cletop® stick type and HFE7100 cleaning fluid. Before
the mating of patch-cord, the fiber
end should be cleaned up by using Cletop® cleaning cassette.
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