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Sinovo Telecom 40Gb/s QSFP+ ER4 Optical Transceiver SOQP-40G-ER

Sinovo Telecom 40Gb/s QSFP+ ER4 Optical Transceiver SOQP-40G-ER

page1image1160
Features
4 CWDM lanes MUX/DEMUX design
Up to 11.2Gbps data rate per wavelength QSFP+ MSA compliant
Up to 40km transmission
Operating case temperature: 0~70C Maximum 3.5W operation power
RoHS compliant

Applications
  •  40G Ethernet
  •  Infiniband interconnects
  •  40G Telecom connections

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1. General Description
This product is a transceiver module designed for 2m-40km optical communication applications. The design is compliant to 40GBASE-ER4 of the IEEE P802.3ba standard. The
module converts 4 inputs channels (ch) of 10Gb/s electrical data to 4 CWDM optical signals, and multiplexes them into a single channel for 40Gb/s optical transmission. Reversely, on the receiver side, the module optically de-multiplexes a 40Gb/s input into 4 CWDM channels signals, and converts them to 4 channel output electrical data.
The central wavelengths of the 4 CWDM channels are 1511, 1531, 1551 and 1571 nm as members of the CWDM wavelength grid defined in ITU-T G694.2. It contains a duplex LC connector for the optical interface and a 148-pin connector for the electrical interface. To minimize the optical dispersion in the long-haul system, single-mode fiber (SMF) has to be applied in this module.
The product is designed with form factor, optical/electrical connection and digital diagnostic interface according to the QSFP Multi-Source Agreement (MSA). It has been designed to meet the harshest external operating conditions including temperature, humidity and EMI interference.
2. Functional Description
This product converts the 4-channel 10Gb/s electrical input data into CWDM optical signals (light), by a driven 4-wavelength Distributed Feedback Laser (DFB) array. The light is combined by the MUX parts as a 40Gb/s data, propagating out of the transmitter module from the SMF. The receiver module accepts the 40Gb/s CWDM optical signals input, and de- multiplexes it into 4 individual 10Gb/s channels with different wavelength. Each wavelength light is collected by a discrete photo diode, and then outputted as electric data after amplified by a TIA. Figure 1 shows the functional block diagram of this product.
A single +3.3V power supply is required to power up this product. Both power supply pins VccTx and VccRx are internally connected and should be applied concurrently. As per MSA specifications the module offers 7 low speed hardware control pins (including the 2-wire serial interface): ModSelL, SCL, SDA, ResetL, LPMode, ModPrsL and IntL.
Module Select (ModSelL) is an input pin. When held low by the host, this product responds to 2-wire serial communication commands. The ModSelL allows the use of this product on a single 2-wire interface bus – individual ModSelL lines must be used.
Serial Clock (SCL) and Serial Data (SDA) are required for the 2-wire serial bus communication interface and enable the host to access the QSFP memory map.The ResetL
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pin enables a complete reset, returning the settings to their default state, when a low level on the ResetL pin is held for longer than the minimum pulse length. During the execution of a reset the host shall disregard all status bits until it indicates a completion of the reset interrupt. The product indicates this by posting an IntL (Interrupt) signal with the Data_Not_Ready bit negated in the memory map. Note that on power up (including hot insertion) the module should post this completion of reset interrupt without requiring a reset.
Low Power Mode (LPMode) pin is used to set the maximum power consumption for the product in order to protect hosts that are not capable of cooling higher power modules, should such modules be accidentally inserted.
Module Present (ModPrsL) is a signal local to the host board which, in the absence of a product, is normally pulled up to the host Vcc. When the product is inserted into the connector, it completes the path to ground though a resistor on the host board and asserts the signal. ModPrsL then indicates its present by setting ModPrsL to a “Low” state.
Interrupt (IntL) is an output pin. “Low” indicates a possible operational fault or a status critical to the host system. The host identifies the source of the interrupt using the 2-wire serial interface. The IntL pin is an open collector output and must be pulled to the Host Vcc voltage on the Host board.
3. Transceiver Block Diagram
page3image13464
TX3
TX2
TX1
TX0 RX3
RX2 RX1 RX0
DFB Driver Array (4ch)
TIA
Array (4ch)

4-wavelength DFB laser Array (4ch)
APD
Array (4ch)

Optical MUX
Optical DeMUX
Single Mode Fiber
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Figure 1: 40Gb/s QSFP ER4 Transceiver Block Diagram
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Dual-LC Connector
4. Pin Assignment and Pin Description
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5. Pin Definitions
Figure 2: MSA compliant Connector
PIN
Logic
Symbol
Name/Description
Note
1
GND
Ground
1
2
CML-I
Tx2n
Transmitter Inverted Data Input
3
CML-I
Tx2p
Transmitter Non-Inverted Data output
4
GND
Ground
1
5
CML-I
Tx4n
Transmitter Inverted Data Input
6
CML-I
Tx4p
Transmitter Non-Inverted Data output
7
GND
Ground
1
8
LVTLL-I
ModSelL
Module Select
9
LVTLL-I
ResetL
Module Reset
10
VccRx
+3.3V Power Supply Receiver
2
11
LVCMOS-I/O
SCL
2-Wire Serial Interface Clock
12
LVCMOS-I/O
SDA
2-Wire Serial Interface Data
13
GND
Ground
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14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
CML-O
CML-O
CML-O
CML-O
CML-O
CML-O
CML-O
LVTTL-O
LVTTL-O
LVTTL-I
CML-I
CML-I
CML-I
CML-I
Rx3n
GND
Rx1p
Rx1n
GND
GND
Rx2n
Rx2p
GND
Rx4n
Rx4p
GND
ModPrsL
IntL
VccTx
Vcc1
LPMode
GND
Tx3p
Tx3n
GND
Tx1p
Tx1n
GND
Receiver Inverted Data Output
Ground
Receiver Non-Inverted Data Output
Receiver Inverted Data Output
Ground
Ground
Receiver Inverted Data Output
Receiver Non-Inverted Data Output
Ground
Receiver Inverted Data Output
Receiver Non-Inverted Data Output
Ground
Module Present
Interrupt
+3.3 V Power Supply transmitter
+3.3 V Power Supply
Low Power Mode
Ground
Transmitter Non-Inverted Data Input
Transmitter Inverted Data Output
Ground
Transmitter Non-Inverted Data Input
Transmitter Inverted Data Output
1
1
1
1
1
1
2
2
1
1
Ground
1
CML-O Rx3p Receiver Non-Inverted Data Output
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Note:
1. GND is the symbol for signal and supply (power) common for QSFP modules. All are common within the QSFP module and all module voltages are referenced to this potential unless otherwise noted. Connect these directly to the host board signal common ground plane.
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2. VccRx, Vcc1 and VccTx are the receiving and transmission power suppliers and shall be applied concurrently. Recommended host board power supply filtering is shown below. Vcc Rx, Vcc1 and Vcc Tx may be internally connected within the QSFP transceiver module in any combination. The connector pins are each rated for a maximum current of 500mA.
6. Absolute Maximum Ratings
It has to be noted that the operation in excess of any individual absolute maximum ratings might cause permanent damage to this module.
Parameter
Symbol
Min
Max
Unit
Note
Storage Temperature
Tst
-20
85
degC
Relative Humidity (non-condensation)
RH
0
85
%
Operating Case Temperature
Topc
0
70
degC
Operating Range
0.002
10
km
Supply Voltage
VCC
-0.5
3.6
V
7. Optical Characteristics
Parameter
Symbol
Min.
Typical
Max
Unit
Notes
Wavelength Assignment
L0
1484.5
1491
1497.5
nm
L1
1504.5
1511
1517.5
nm
L2
1524.5
1531
1537.5
nm
L3
1544.5
1551
1557.5
nm
Transmitter
Side-mode Suppression Ratio
SMSR
30
-
-
dB
Total Average Launch Power
PT
-
-
8.3
dBm
Average Launch Power, each Lane
-7
-
2.3
dBm
Optical Modulation Amplitude, each Lane
OMA
-4
-
+3.5
dBm
Difference in Launch Power between any two Lanes
-
-
6.5
dB
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(OMA)
Launch Power in OMA minus Transmitter and Dispersion Penalty (TDP), each Lane
-4.8
-
dBm
TDP, each Lane
TDP
2.3
dB
Extinction Ratio
ER
3.5
-
-
dB
Relative Intensity Noise
Rin
-
-
-128
dB/Hz
12dB reflection
Optical Return Loss Tolerance
-
-
20
dB
Transmitter Reflectance
RT
-12
dB
Transmitter Eye Mask Definition {X1, X2, X3, Y1, Y2, Y3}
{0.25,0.4,0.45,0.25,0.28,0.4 }
Average Launch Power OFF Transmitter, each Lane
Poff
-30
dBm
Receiver
Damage Threshold
THd
3.3
dBm
1
Average Power at Receiver Input, each Lane
-13.7
2.3
dBm
Receiver Reflectance
RR
-
-
-26
dB
Receiver Power (OMA), each Lane
-
-
3.5
dBm
Stressed Receiver Sensitivity in OMA, each Lane
-
-
-9.9
dBm
Receiver Sensitivity, each Lane
SR
-
-
-11.5
dBm
Difference in Receive Power between any two Lanes (OMA)
7.5
dB
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Receive Electrical 3 dB upper Cutoff Frequency, each Lane
12.3
GHz
Conditions of Stress Receiver Sensitivity Test2
Vertical Eye Closure Penalty, each Lane
1.6
dB
Stressed Eye Jitter, each Lane
0.3
UI
Notes:
  1. The receiver shall be able to tolerate, without damage, continuous exposure to a modulated optical input signal having this power level on one lane. The receiver does not have to operate correctly at this input power.
  2. Vertical eye closure penalty and stressed eye jitter are test conditions for measuring stressed receiver sensitivity. They are not characteristics of the receiver.
8. Electrical Characteristics
The following electrical characteristics are defined over the Recommended Operating temperature and supply voltage unless otherwise specified.
Parameter
Symbol
Min.
Typical
Max
Unit
Notes
Supply Voltage
Vccl, VccTx, VccRx
-0.5
-
3.6
V
Data Rate, each Lane
-
10.3125
11.2
Gbps
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9. Mechanical Dimensions
10. ESD
This transceiver is specified as ESD threshold 1kV for all electrical input pins, tested per MIL- STD-883, Method 3015.4 /JESD22-A114-A (HBM). However, normal ESD precautions are still required during the handling of this module. This transceiver is shipped in ESD protective packaging. It should be removed from the packaging and handled only in an ESD protected environment.
11. Laser Safety
This is a Class 1 Laser Product according to IEC 60825-1:1993:+A1:1997+A2:2001. This product complies with 21 CFR 1040.10 and 1040.11 except for deviations pursuant to Laser Notice No. 50, dated (July 24, 2007)

Ordering information
Part Number
Product Description
SOQP-40G-ER
1550nm, 40Gbps, 40km, 0oC ~ +70oC
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